This invention relates to semiconductor device manufacturing and more particularly to a method and apparatus for effecting burn-in of a semiconductor device.
Over the years, the semiconductor industry has continually strived to reduce the size of devices. As a result of that effort, the devices of today are much smaller than those of just a few years ago. In fact, the technology has progressed to such a level that the packaging of the devices has become a major problem. The devices are becoming so minuscule that the conventional packaging techniques presently used are proving to be inadequate.
To illustrate this problem, a partially assembled conventional semiconductor package is shown in FIG. 1 comprising a semiconductor die 10 having a plurality of die pads 12, and a lead frame 14 with a plurality of conductive leads 16. For the sake of simplicity, only one set of leads 16 is shown in the figure. The die 10 is attached to the central portion of the lead frame 14, and each of the leads 16 is electrically connected to a corresponding die pad 12 via a bonding wire 18. The wires 18 are connected to both the leads 16 and the die pads 12 by way of an ultrasonic or thermosonic welding process.
The distance 22 between two adjacent die pads is defined as the pad pitch. As the semiconductor device 10 becomes smaller in size, the pad pitch also decreases. At a certain point, the pad pitch becomes so small that the leads 16 begin to come into contact with each other, causing shorts. Due to the limitations of the mechanical stamping procedure by which lead frames are produced, the separation between leads 16 cannot be made smaller than a certain limiting pitch. This limit has been found to be approximately 10 mils, which effectively sets a lower limit on the size of the die for which lead frames can be used. The wafer fabrication technology in existence today can produce dies smaller than the smallest that can still be used on a lead frame. It is therefore desirable to employ a different packaging technique that is not as limited as lead frames.
Due to the physical limitation of lead frames, a new packaging technique commonly known as tape automated bonding (TAB) has emerged. A typical TAB package (partial assembly) is illustrated in FIG. 2 comprising a layer of tape or film 30 having a plurality of conductive leads 36 on it formed by deposition and etching in a lithographic process, and a semiconductor die 32 with a plurality of die pads 34. A cross sectional view of a pair of leads 36 is provided in FIG. 3 to further illustrate this package.
To form the leads on the tape, a layer of copper 38 is first glued onto the tape 30. A layer of photo resist (not shown) is then put onto the copper layer 38. Thereafter, selected portions of the photo resist layer are exposed to ultraviolet radiation to outline a lead pattern on the tape 30. The individual copper leads 38 are then formed by etching away selected portions of the copper layer. Because copper oxidizes at a rapid rate when exposed to air, a second layer of conductive material 40 is used to cover the copper to prevent this oxidation. The conductive material 40 is usually imposed upon the copper leads 38 through a process called electroplating. This process enables the conductive material 40 to adhere only to the metallic surface (that is, the copper leads 38) and not to the tape 30. Using the process just described, leads such as those shown in FIG. 3 are formed. The second conductive layer 40 is usually composed of tin or gold and for that reason, most tapes are referred to as either tin plated or gold plated tape.
After the leads are formed, they are brought . into contact with die pads 34 of the semiconductor die 32 and bonded thereto (FIG. 2). Notice that no bonding wires are necessary because each lead is directly bonded to each die pad. Because the conductive leads 36 are patterned on tape 30 using lithographic fabrication techniques, the widths of leads 36 may be made much thinner than those made by a mechanical stamping procedure or a conventional etching procedure such as that used for a lead frame. The smallest pad pitch a TAB package can presently accommodate is approximately 4 mils. This allows quite a significant reduction in the size of the semiconductor device.
The choice between tin or gold plated tape involves a trade off between cost and ease of manufacturing. From a semiconductor manufacturing standpoint, gold plated tape is preferable because there are very few problems associated with the production of gold plated tape. The cost of gold, though, is three times that of tin. Moreover, the price of gold is volatile whereas the price of tin is relatively stable. Thus, tin would seem to be the better choice. However, there are a number of problems associated with tin plated tape. The first problem, with reference to FIG. 4, is that the copper and tin, after a while, begin to form an intermetallic layer 42. Given sufficient time, this intermetallic layer will grow until it encompasses the entire lead. While this intermetallic layer does protect the copper in the lead frame, the formation of this intermetallic layer before bonding is undesirable because it forms poor connections when it is soldered. It is quite important that the leads form good connections when soldered because soldering is usually the method by which the TAB package is actually attached to a printed circuit board.
Another problem with tin plated tape is that tin forms an insulating oxide when exposed to the atmosphere. It does not oxidize as quickly as copper but it nonetheless does oxidize. If the TAB package is exposed to the atmosphere for too long, the entire tin layer will oxidize leaving only an oxidation layer, an intermetallic layer, and the copper lead. This is undesirable for several reasons. First, the oxidation layer is an insulator. Therefore, it would have to be removed before the lead could be attached to a circuit board. Second, during the soldering process, the intermetallic layer does not form solid bonds when soldered so that even if the oxidation layer were removed, the lead could not be securely attached to a circuit board. The formation of the intermetallic layer and the oxidation layer are time dependent so that once a semiconductor device is packaged, there is only a short period of time during which the package must be attached to a printed circuit board. After that time, it would be difficult for the leads of the tape to be soldered, and to be physically and electrically connected securely to the circuit board either due to the formation of the intermetallic layer or due to the formation of the oxide. The time period between the actual packaging of the semiconductor device and the time at which the package must be attached to a circuit board is defined as the shelf life of the package. The package must be shipped from the manufacturer to the customer within the shelf life of the package in order to enable the customer to attach the package to a circuit board. A long shelf life would obviously be desirable. The formation of the intermetallic layer and the oxidation layer are also temperature dependent as explained below.
The shelf life problem of tin plated tape is exacerbated by the burning-in of the semiconductor device on the tape. Burn-in is a routine procedure used by semiconductor manufacturers to detect defects in semiconductor devices. The burn-in procedure is usually carried out by inserting the entire device package into an oven and heating the assembly at a specified temperature for a certain period of time. The device is caused to operate electrically during this time to ensure that it is functionally sound. Because the formation of the intermetallic and the oxidation layers on the leads of the package are temperature dependent as well as time dependent, the heating of the package accelerates the growth of these layers which, in turn, shortens the shelf life of the device package. The shelf life of a typical tin plated TAB package before burn-in ranges from forty eight hours to several months. If burn-in were performed, the shelf life would be reduced to zero. For this reason, tin plated TAB devices are currently not being burned-in. This significantly increases the chance that a customer will receive a device having a defect. Since this is obviously undesirable, a need exists for a method and apparatus for performing burn-in which does not accelerate the growth of the intermetallic and oxidation layers.
Another undesirable aspect of the prior art burn-in apparatus is that the ovens used to heat the devices are bulky, expensive, and requires a considerable amount of floor space. A burn-in apparatus which eliminates the need for ovens would also be desirable.
Therefore, an object of the invention is to provide a method and apparatus for burning in semiconductor devices which does not accelerate the growth of the intermetallic and oxidation layers on the leads of the packages.
Another object of the invention is to provide a burn-in apparatus which is considerably smaller in size than the ovens currently used.
Yet another object of the invention is to provide a burn-in apparatus which can be economically produced.